Detailed JD :

• Expertise in Physical Design (PD) processes, particularly in RTL to GDSII conversion.
• Proficient in working with advanced technology nodes including 4nm, 5nm, 6nm, and 7nm.
• Strong hands-on experience with physical design tools, especially Innovus.
• Thorough understanding of layout design, floorplanning, placement, and routing.
• Capable of optimizing designs for power, performance, and area (PPA) at lower technology nodes.
• Knowledge of timing closure, signal integrity, and DFM (Design for Manufacturability) techniques.
• Ability to perform physical verification tasks such as DRC (Design Rule Checking) and LVS (Layout Versus Schematic).
• Familiarity with STA (Static Timing Analysis) tools and methodologies.
• Proficient in using EDA (Electronic Design Automation) tools for physical design.
• Excellent problem-solving skills and ability to debug and resolve complex design issues.
• Strong collaboration skills to work effectively with cross-functional teams.

Must to have :

RTL2GDSII and lower technology  nodes like 4nm, 5nm, 6 nm, 7nm. Should be good any of tools like  Innovus.